View LMX2522_9070941.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

LMX2522 , lmx2532 www.ti.com snws009b ? march 2003 ? revised april 2013 LMX2522/lmx2532 pllatinum ? frequency synthesizer system with integrated vcos check for samples: LMX2522 , lmx2532 1 features description LMX2522 and lmx2532 are highly integrated, high 23 ? small size performance, low power frequency synthesizer ? small 5.0 mm x 5.0 mm x 0.75 mm 28-pin systems optimized for korean pcs (k-pcs) with wqfn package gps and korean cellular (k-cellular) with gps, ? rf/gps synthesizer system cdma (1xrtt, is-95) mobile handsets. using a proprietary digital phase locked loop technique, ? integrated rf vco LMX2522 and lmx2532 generate very stable, low ? integrated gps vco noise local oscillator signals for up and down ? integrated loop filter conversion in wireless communications devices. ? low spurious, low phase noise fractional- LMX2522 and lmx2532 include a rf voltage n rf pll based on 11-bit delta sigma controlled oscillator (vco), a gps vco, a loop filter, modulator and a fractional-n rf pll based on a delta sigma modulator. in concert these blocks form a closed loop ? 10 khz frequency resolution rf and gps synthesizer system. LMX2522 supports ? if synthesizer system the korean pcs band with gps and lmx2532 ? integer-n if pll supports the korean cellular band with gps. ? programmable charge pump current LMX2522 and lmx2532 include an integer-n if pll levels also. for more flexible loop filter designs, the if pll ? programmable frequencies includes a 4-level programmable charge pump. together with an external vco and loop filter, ? supports various reference oscillator LMX2522 and lmx2532 make a complete closed frequencies loop if synthesizer system. ? 19.20/19.68 mhz serial data is transferred to the device via a three- ? fast lock time: 500 s wire microwire interface (data, le, clk). ? low current consumption operating supply voltage ranges from 2.7 v to 3.3 v. ? 17 ma at 2.8 v lmx2502 and lmx2512 feature low current ? 2.7 v to 3.3 v operation consumption: 17 ma at 2.8 v. ? digital filtered lock detect output LMX2522 and lmx2532 are available in a 28-pin ? hardware and software power down control wqfn package. applications ? korean pcs cdma systems with gps ? korean cellular cdma systems with gps 1 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 pllatinum is a trademark of texas instruments. 3 all other trademarks are the property of their respective owners. production data information is current as of publication date. copyright ? 2003 ? 2013, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters.
LMX2522 , lmx2532 snws009b ? march 2003 ? revised april 2013 www.ti.com functional block diagram connection diagram note: analog ground connected through exposed die attached pad. figure 1. 28-pin wqfn (njb) package 2 submit documentation feedback copyright ? 2003 ? 2013, texas instruments incorporated product folder links: LMX2522 lmx2532 cpout 14 nc nc nc v dd nc nc le nc clk data v dd 15 gnd oscin ce ld v cc rfout gnd v cc v cc gnd v cc fin nc 13 12 11 10 9 8 16 17 21 20 19 18 1 2 3 4 5 6 7 22 23 24 25 26 27 28 v cc v cc v dd v dd rf phase detector loop filter n/(n+1) divider delta sigma control rf out fin oscin if n divider if phase detector if r divider cpout rf vco gps vco serial interface power down control lock detect ce v cc v dd gnd ld clk le data
LMX2522 , lmx2532 www.ti.com snws009b ? march 2003 ? revised april 2013 pin descriptions pin number name i/o description 1 cpout o if pll charge pump output 2 nc ? do not connect to any node on printed circuit board. 3 nc ? do not connect to any node on printed circuit board. 4 v dd ? supply voltage for if analog circuitry 5 le i microwire latch enable 6 clk i microwire clock 7 data i microwire data 8 v dd ? supply voltage for vcos 9 nc ? do not connect to any node on printed circuit board. 10 nc ? do not connect to any node on printed circuit board. 11 nc ? do not connect to any node on printed circuit board. 12 nc ? do not connect to any node on printed circuit board. 13 v dd ? supply voltage for vcos 14 v dd ? supply voltage for vcos output buffer 15 rfout o buffered vco output 16 v cc ? supply voltage for rf prescaler 17 v cc ? supply voltage for charge pump 18 v cc ? supply voltage for rf digital circuitry 19 ld o lock detect 20 ce i chip enable control pin 21 gnd ? ground for digital circuitry 22 oscin i reference frequency input 23 v cc ? supply voltage for reference input buffer 24 gnd ? ground for digital circuitry 25 v cc ? supply voltage for if digital circuitry 26 fin i if buffer/prescaler input 27 v cc ? supply voltage for if buffer/prescaler 28 nc ? do not connect to any node on printed circuit board. copyright ? 2003 ? 2013, texas instruments incorporated submit documentation feedback 3 product folder links: LMX2522 lmx2532
LMX2522 , lmx2532 snws009b ? march 2003 ? revised april 2013 www.ti.com these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. absolute maximum ratings (1) (2) (3) parameter symbol ratings units supply voltage v cc , v dd -0.3 to 3.6 v voltage on any pin v i -0. 3 to v dd +0.3 v to gnd -0. 3 to v cc +0.3 v storage temperature t stg -65 to 150 c range (1) absolute maximum ratings indicate limits beyond which damage to the device may occur. recommended operating conditions indicate conditions for which the device is intended to be functional, but do not ensure specific performance limits. for ensured specifications and test conditions, refer to the electrical characteristics section. the ensured specifications apply only for the conditions listed. (2) this device is a high performance rf integrated circuit with an esd rating < 2 kv and is esd sensitive. handling and assembly of this device should be done at esd protected work stations. (3) gnd = 0 v. recommended operating conditions parameter symbol min typ max units ambient temperature t a -30 25 85 c supply voltage (to v cc , v dd 2.7 3.3 v gnd) electrical characteristics (v cc = v dd = 2.8 v, t a = 25 c; unless otherwise noted.) symbol parameter conditions min typ max units i cc parameters i cc + i dd total supply current ob_crl [1:0] = 00 17 19 ma (i cc + rf pll total supply current ob_crl [1:0] = 00 16 18 ma i dd ) rf i pd power down current (1) ce = low or 20 a rf_en = 0 if_en = 0 reference oscillator f oscin reference oscillator input frequency 19.20 mhz and 19.68 19.20 19.68 mhz (2) mhz are supported v oscin reference oscillator input sensitivity 0.2 v cc v p-p (1) in power down mode, set data, clk and le pins to 0 v (gnd). (2) the reference frequency must also be programmed using the osc_freq control bit. for other reference frequencies, please contact texas instruments. 4 submit documentation feedback copyright ? 2003 ? 2013, texas instruments incorporated product folder links: LMX2522 lmx2532
LMX2522 , lmx2532 www.ti.com snws009b ? march 2003 ? revised april 2013 electrical characteristics (continued) (v cc = v dd = 2.8 v, t a = 25 c; unless otherwise noted.) symbol parameter conditions min typ max units rf vco f rfout frequency range (3) LMX2522lq1635 rf vco 1619.62 1649.62 mhz lmx2532lq0967 954.42 979.35 mhz lmx2532lq1065 1052.64 1077.57 mhz p rfout rf output power ob_crl [1:0] = 11 -2 1 4 dbm ob_crl [1:0] = 10 -5 -2 1 dbm ob_crl [1:0] = 01 -7 -4 -1 dbm ob_crl [1:0] = 00 -9 -6 -3 dbm lock time (4) LMX2522lq1635 30 mhz band for rf 500 800 s pll lmx2532lq0967 25 mhz band for rf 500 800 s pll lmx2532lq1065 25 mhz band for rf 500 800 s pll reference spurs -75 dbc rms phase error rf pll in all band 1.3 degrees l(f) phase noise LMX2522lq1635 @100 khz offset -113 -112 dbc/hz @1.25 mhz offset -138 -136 dbc/hz lmx2532lq0967 @100 khz offset -117 -115 dbc/hz @900 khz offset -139 -138 dbc/hz lmx2532lq1065 @100 khz offset -117 -115 dbc/hz @900khz offset -139 -138 dbc/hz 2nd harmonic suppression -25 dbc 3rd harmonic suppression -20 dbc gps vco f rfout operating frequency LMX2522lq1635 gps vco 1355.04 mhz lmx2532lq0967 1490.04 mhz lmx2532lq1065 1391.82 mhz p rfout output power ob_crl [1:0] = 11 -2 1 4 dbm ob_crl [1:0] = 10 -5 -2 1 dbm ob_crl [1:0] = 01 -7 -4 -1 dbm ob_crl [1:0] = 00 -9 -6 -3 dbm lock time (4) from rf to gps pll 600 800 s reference spurs -75 dbc rms phase error rf pll in all band 1.3 degrees l(f) phase noise @100 khz offset -113 -112 dbc/hz @1.25 mhz offset -138 -136 dbc/hz 2nd harmonic suppression -25 dbc 3rd harmonic suppression -20 dbc (3) for other frequency ranges, please contact texas instruments. (4) lock time is defined as the time difference between the beginning of the frequency transition and the point at which the frequency remains within +/- 1 khz of the final frequency. copyright ? 2003 ? 2013, texas instruments incorporated submit documentation feedback 5 product folder links: LMX2522 lmx2532
LMX2522 , lmx2532 snws009b ? march 2003 ? revised april 2013 www.ti.com electrical characteristics (continued) (v cc = v dd = 2.8 v, t a = 25 c; unless otherwise noted.) symbol parameter conditions min typ max units if pll f fin operating frequency LMX2522lq1635 if_freq [1:0] = 10, 440.76 mhz (5) default value lmx2532lq0967 if_freq [1:0] = 00, 170.76 mhz default value lmx2532lq1065 if_freq [1:0] = 01, 367.20 mhz default value p fin if input sensitivity -10 0 dbm f if phase detector frequency 120 khz i cpout charge pump current if_cur [1:0] = 00 100 a if_cur [1:0] = 01 200 a if_cur [1:0] = 10 300 a if_cur [1:0] = 11 800 a digital interface (data, clk, le, ld, ce) v ih high-level input voltage 0.8 v dd v dd v 0.8 v cc v cc v v il low-level input voltage 0 0.2 v dd v 0 0.2 v cc v i ih high-level input current -10 10 a i il low-level input current -10 10 a input capacitance 3 pf v oh high-level output voltage 0.9 v dd v 0.9 v cc v v ol low-level output voltage 0.1 v dd v 0.1 v cc v output capacitance 5 pf microwire interface timing t cs data to clock set up time 50 ns t ch data to clock hold time 10 ns t cwh clock pulse width high 50 ns t cwl clock pulse width low 50 ns t es clock to latch enable set up time 50 ns t ew latch enable pulse width 50 ns (5) frequencies other that the default value can be programmed using words r4 and r5. see programming description for details. serial data input timing 6 submit documentation feedback copyright ? 2003 ? 2013, texas instruments incorporated product folder links: LMX2522 lmx2532
LMX2522 , lmx2532 www.ti.com snws009b ? march 2003 ? revised april 2013 functional description general description LMX2522/32 is a highly integrated frequency synthesizer system that generates lo signals for pcs, cellular cdma and gps systems. these devices include all of the functional blocks of a pll, rf vco, prescaler, rf phase detector, and loop filter. the need for external components is limited to a few passive elements for matching the output impedance and bypass elements for power line stabilization. in addition to the rf circuitry, the ic also includes if frequency dividers, and an if phase detector to complete the if synthesis with an external vco and loop filter. table 4 summarizes the counter values to generate the default if frequencies. using a low spurious fractional-n synthesizer based on a delta sigma modulator, the circuit can support 10 khz channel spacing for pcs, cellular cdma and gps systems. the fractional-n synthesizer enables faster lock time, which reduces power consumption and system set-up time. additionally, the loop filter occupies a smaller area as opposed to the integer-n architecture. this allows the loop filter to be embedded into the circuit, minimizing the external noise coupling and total form factor. the delta sigma architecture delivers very low spurious, which can be a significant problem for other pll solutions. the circuit also supports commonly used reference frequencies of 19.20 mhz and 19.68 mhz. frequency generation rf-pll section the divide ratio can be calculated using the following equation: LMX2522 ? pcs cdma: f vco = {8 x rf_b + rf_a + (rf_fn / f osc ) x 10 4 } x f osc where ? (rf_a < rf_b) lmx2532 ? cellular cdma: f vco = {6 x rf_b + rf_a + (rf_fn / f osc ) x 10 4 } x f osc where ? (rf_a < rf_b) ? f vco : output frequency of voltage controlled oscillator (vco) ? rf_b: preset divide ratio of binary 4-bit programmable counter (2 rf_b 15) ? rf_a: preset divide ratio of binary 3-bit swallow counter (0 rf_a 7 for LMX2522 or 0 rf_a 5 for lmx2532) ? rf_fn: preset numerator of binary 11-bit modulus counter (0 rf_fn < 1920 for f osc = 19.20 mhz or 0 rf_fn < 1968 for f osc = 19.68 mhz) ? f osc : reference oscillator frequency copyright ? 2003 ? 2013, texas instruments incorporated submit documentation feedback 7 product folder links: LMX2522 lmx2532
LMX2522 , lmx2532 snws009b ? march 2003 ? revised april 2013 www.ti.com gps-pll section the divide ratio can be calculated using the following equation: LMX2522 ? pcs cdma: f vco = {6 x rf_b + rf_a + (rf_fn / f osc ) x 10 4 } x f osc where ? (rf_a < rf_b) lmx2532 ? cellular cdma: f vco = {8 x rf_b + rf_a + (rf_fn / f osc ) x 10 4 } x f osc where ? (rf_a < rf_b) ? f vco : output frequency of voltage controlled oscillator (vco) ? rf_b: preset divide ratio of binary 4-bit programmable counter (2 rf_b 15) ? rf_a: preset divide ratio of binary 3-bit swallow counter (0 rf_a 5 for LMX2522 or 0 rf_a 7 for lmx2532) ? rf_fn: preset numerator of binary 11-bit modulus counter (0 rf_fn < 1920 for f osc = 19.20 mhz or 0 rf_fn < 1968 for f osc = 19.68 mhz) ? f osc : reference oscillator frequency pcs cdma applications using the LMX2522, if the gps frequency is 1355.04 mhz, table 1 provides the proper register settings: table 1. settings for gps (1355.04 mhz) in LMX2522 pcs cdma application reference frequency rf_b rf_a rf_fn 19.20 mhz 11 4 1104 19.68 mhz 11 2 1680 cellular cdma applications using the lmx2532, in which the gps frequency is 1490.04 mhz, then table 2 provides the proper register settings: table 2. settings for gps (1490.04 mhz) in lmx2532 cellular cdma application reference frequency rf_b rf_a rf_fn 19.20 mhz 9 5 1164 19.68 mhz 9 3 1404 cellular cdma applications using the lmx2532, in which the gps frequency is 1391.82 mhz, then table 3 provides the proper register settings: table 3. settings for gps (1391.82 mhz) in lmx2532 cellular cdma application reference frequency rf_b rf_a rf_fn 19.20 mhz 9 0 942 19.68 mhz 8 6 1422 8 submit documentation feedback copyright ? 2003 ? 2013, texas instruments incorporated product folder links: LMX2522 lmx2532
LMX2522 , lmx2532 www.ti.com snws009b ? march 2003 ? revised april 2013 if-pll section f vco = {16 x if_b + if_a} x f osc / if_r where ? (if_a < if_b) ? f vco : output frequency of the voltage controlled oscillator (vco) ? if_b: preset divide ratio of the binary 9-bit programmable counter (1 if_b 511) ? if_a: preset divide ratio of the binary 4-bit swallow counter (0 if_a 15) ? f osc : reference oscillator frequency ? if_r: preset divide ratio of the binary 9-bit programmable reference counter (2 if_r 511) from the above equation, the LMX2522/32 generates the fixed if frequencies as summarized in table 4 . table 4. if frequencies device type f vco if_b if_a f osc /if_r (mhz) (khz) LMX2522lq1635 440.76 229 9 120 lmx2532lq0967 170.67 88 15 120 lmx2532lq1065 367.20 191 4 120 vco frequency tuning the center frequency of the rf vco is mainly determined by the resonant frequency of the tank circuit. this tank circuit is implemented on-chip and requires no external inductor. the LMX2522/32 actively tunes the tank circuit to the required frequency with the built-in tracking algorithm. bandwidth control and frequency lock during the frequency acquisition period, the loop bandwidth is significantly extended to achieve frequency lock. once frequency lock occurs, the pll will return to a steady state condition with the loop bandwidth set to its nominal value. the transition between acquisition and lock modes occurs seamlessly and extremely fast, thereby, meeting the stringent requirements associated with lock time and phase noise. several controls (bw_dur, bw_crl and bw_en) are used to optimize the lock time performance. spurious reduction to improve the spurious performance of the device one of two types of spurious reduction schemes can be selected: ? a continuous optimization scheme, which tracks the environmental and voltage variations, giving the best spurious performance over changing conditions ? a one time optimization scheme, which sets the internal compensation values only when the pll goes into a locked state. the spurious reduction can also be disabled, but it is recommended that the continuous optimization mode be used for normal operation. copyright ? 2003 ? 2013, texas instruments incorporated submit documentation feedback 9 product folder links: LMX2522 lmx2532
LMX2522 , lmx2532 snws009b ? march 2003 ? revised april 2013 www.ti.com power down mode the LMX2522 and lmx2532 include a power down mode to reduce the power consumption. the LMX2522/32 enters into the power down mode either by taking the ce pin low or by setting the power down bits in register r1. table 5 summarizes the power down function. if ce is set low, the circuit is powered down regardless of the register values. when ce is high, the if and rf circuitry are individually powered down by setting the register bits. table 5. power down configuration (1) ce pin rf_en if_en rf circuitry if circuitry 0 x x off off 1 0 0 off off 1 0 1 off on 1 1 0 on off 1 1 1 on on (1) x = don ? t care. lock detect the ld output can be used to indicate the lock status of the rf pll. bit 21 in register r0 determines the signal that appears on the ld pin. when the rf pll is not locked, the ld pin remains low. after obtaining phase lock, the ld pin will have a logical high level. the output can also be programmed to be ground at all times. table 6. lock detect modes ld bit mode 0 disable (gnd) 1 enable table 7. lock detect logic table (1) (2) (3) (4) (5) rf pll section ld output locked high not locked low (1) ld output becomes low when the phase error is larger than t w2 . (2) ld output becomes high when the phase error is less than t w1 for four or more consecutive cycles. (3) phase error is measured on leading edge. only errors greater than t w1 and t w2 are labeled. (4) t w1 and t w2 are equal to 10 ns. (5) the lock detect comparison occurs with every 64 th cycle of f r and f n . figure 2. lock detect timing diagram waveform 10 submit documentation feedback copyright ? 2003 ? 2013, texas instruments incorporated product folder links: LMX2522 lmx2532 f r /64 ld ' t > t w1 ' t > t w2 f n /64
LMX2522 , lmx2532 www.ti.com snws009b ? march 2003 ? revised april 2013 figure 3. lock detect flow diagram microwire interface the programmable register set is accessed via the microwire serial interface. the interface comprises three signal pins: clk, data, and le. serial data (data) is clocked into the 24-bit shift register on the rising edge of the clock (clk). the last bits decode the internal control register address. when the latch enable (le) transitions from low to high, data stored in the shift registers is loaded into the corresponding control register. copyright ? 2003 ? 2013, texas instruments incorporated submit documentation feedback 11 product folder links: LMX2522 lmx2532 no no no yes yes yes phase error < t w1 ld = low (not locked) phase error < t w1 phase error < t w1 ld = high (locked) phase error < t w1 phase error > t w2 yes no no yes start
LMX2522 , lmx2532 snws009b ? march 2003 ? revised april 2013 www.ti.com programming description control register content map the serial interface has a 24-bit shift register to store the incoming data bits temporarily. the incoming data is loaded into the shift register from msb to lsb. the data is shifted at the rising edge of the clock signal. when the latch enable signal transitions from low to high, the data stored in the shift register is transferred to the proper register depending on the address bit settings. the selection of the particular register is determined by the control bits indicated in boldface text. at initial start-up, the microwire loading requires 4 default words (registers r3, loaded first, to r0, loaded last). after the device has been initially programmed, the rf vco frequency can be changed using a single register (r0). if an if frequency other than the default value for the device is desired the spi_def bit should be set to 0, the desired values for if_a, if_b, and if_r entered and words r6 to r0 should be sent. the control register content map describes how the bits within each control register are allocated to the specific control functions. table 8. complete register map register msb shift register bit location lsb 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 r0 spi_ rf rf sp rf_b rf_a rf_fn 0 0 (default) def _ _ ur [3:0] [2:0] [10:0] se ld _ l cr l r1 if_ os 1 0 0 0 0 0 0 0 spur_ 0 0 1 0 1 ob_ rf if_ 0 1 (default) freq c_ rdt crl _ en [1:0] fr [1:0] [1:0] en eq r2 if_ 0 0 1 0 0 1 1 1 0 1 1 0 1 0 1 0 0 0 1 0 1 0 (default) cur[1:0] r3 bw_ bw_ b 1 0 1 1 1 1 0 1 0 0 0 1 1 0 vco_ 0 1 1 (default) dur crl w_ cur [1:0] [1:0] en [1:0] r4 0 0 0 1 0 0 0 if_a if_b 0 1 1 1 [3:0] [8:0] r5 0 0 1 1 0 0 0 0 1 0 if_r 0 1 1 1 1 [8:0] r6 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 note: bold numbers represent the address bits. 12 submit documentation feedback copyright ? 2003 ? 2013, texas instruments incorporated product folder links: LMX2522 lmx2532
LMX2522 , lmx2532 www.ti.com snws009b ? march 2003 ? revised april 2013 r0 register the r0 register address bits (r0 [1:0]) are ? 00 ? . the spi_def bit selects between using the default if counter values and user programmable values. the use of the default counter values requires that only words r0 to r3 (registers r3, loaded first, to r0, loaded last) be sent after initial power up. the rf_ld bit activates the lock detect output of the ld pin (pin 19). the lock detect mode shows the lock status of the rf pll. the waveform of the lock detect mode is shown in figure 2 , in the functional description section on lock detect . the spur_crl bit is set to 1 only in the gps mode with the lmx2532lq1065 when a 19.68 mhz reference oscillator is used. the rf n counter consists of the 4-bit programmable counter (rf_b counter), the 3-bit swallow counter (rf_a counter) and the 11-bit delta sigma modulator (rf_fn counter). the equations for calculating the counter values are presented below. table 9. r0 register register msb shift register bit location lsb 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 data field address field r0 spi_ rf rf sp rf_b rf_a rf_fn 0 0 (default) def _ _ ur [3:0] [2:0] [10:0] se ld _ l cr l name functions spi_def default register selection 0 = off (use values set in r0 to r6) 1 = on (use default values set in r0 to r3) rf_sel rf select configuration see table 10 . rf_sel configuration below rf_ld rf lock detect 0 = hard zero (gnd) 1 = lock detect spur_crl spur control 1 = lmx2532lq1065 in gps mode with 19.68 mhz reference oscillator only 0 = all other options rf_b [3:0] rf_b counter 4-bit programmable counter 2 rf_b 15 rf_a [2:0] rf_a counter 3-bit swallow counter 0 rf_a 7 for LMX2522 0 rf_a 5 for lmx2532 rf_fn [10:0] rf fractional numerator counter 11-bit programmable counter 0 rf_fn < 1920 for f osc = 19.20 mhz 0 rf_fn < 1968 for f osc = 19.68 mhz copyright ? 2003 ? 2013, texas instruments incorporated submit documentation feedback 13 product folder links: LMX2522 lmx2532
LMX2522 , lmx2532 snws009b ? march 2003 ? revised april 2013 www.ti.com table 10. rf_sel configuration device type rf_sel = 0 rf_sel = 1 LMX2522 gps k-pcs lmx2532 k-cellular gps rf n counter setting: counter name symbol function modulus counter rf_fn rf n divider n = prescaler x rf_b + rf_a + (rf_fn / programmable rf_b f osc ) 10 4 counter swallow counter rf_a pulse swallow function: f = {prescaler x rf_b + rf_a + (rf_fn / f osc ) x 10 4 } x f osc where (rf_a < rf_b) where ? f vco : output frequency of voltage controlled oscillator (vco) prescaler values: device type rf prescaler gps prescaler LMX2522 8 6 lmx2532 6 8 ? rf_b: preset divide ratio of binary 4-bit programmable counter (2 rf_b 15) ? rf_a: preset divide ratio of binary 3-bit swallow counter (0 rf_a 7 for prescaler of 8 or 0 rf_a 5 for prescaler of 6) ? rf_fn: preset numerator of binary 11-bit modulus counter (0 rf_fn < 1920 for f osc = 19.20 mhz; 0 rf_fn < 1968 for f osc = 19.68 mhz) ? f osc : reference oscillator frequency note: for the use of reference frequencies other than those specified, please contact texas instruments. 14 submit documentation feedback copyright ? 2003 ? 2013, texas instruments incorporated product folder links: LMX2522 lmx2532
LMX2522 , lmx2532 www.ti.com snws009b ? march 2003 ? revised april 2013 r1 register the r1 register address bits (r1 [1:0]) are ? 01 ? . the if_freq bits selects the default if frequency applicable to the specific cdma system. for the LMX2522 the default if frequency is 440.76 mhz, and for the lmx2532 the default if frequencies are 367.20 mhz and 170.76 mhz, depending on variant. reference frequency selection bit (osc_freq) selects either 19.20 mhz or 19.68 mhz for the reference oscillator frequency. the internal spurious reduction scheme is controlled by the spur_rdt [1:0] bits. there are two different spur reduction schemes: a continuous tracking mode and a single optimization mode. the continuous tracking mode will adjust for variations in voltage and temperature. the single optimization mode fixes the internal compensation parameters only when the pll goes into the locked state. the spur reduction can also be disabled, but it is recommended that the continuous mode be used for normal operation. the ob_crl [1:0] bits determine the power level of the rf output buffer. the power level is set according to the system requirement. the two bits, rf_en and if_en, logically select the active state of the rf/gps synthesizer system and the if pll, respectively. the entire ic can be placed in a power down state by using the ce control pin (pin 20). table 11. r1 register register msb shift register bit location lsb 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 data field address field r1 if_ os 1 0 0 0 0 0 0 0 spur_ 0 0 1 0 1 ob_ rf if_ 0 1 (default) freq c_ rdt crl _ en [1:0] fr [1:0] [1:0] en eq name functions if_freq [1:0] if frequency selection 00 = 170.76 mhz (lmx2532lq0967) 01 = 367.20 mhz (lmx2532lq1065) 10 = 440.76 mhz (LMX2522lq1635) osc_freq reference frequency selection 0 = 19.20 mhz 1 = 19.68 mhz spur_rdt [1:0] spur reduction scheme 00 = no spur reduction 01 = not used 10 = continuous tracking of variation (recommended) 11 = one time optimization ob_crl [1:0] rf output power control 00 = minimum output power 01 = 10 = 11 = maximum output power rf_en rf enable 0 = rf off 1 = rf on if_en if enable 0 = if off 1 = if on copyright ? 2003 ? 2013, texas instruments incorporated submit documentation feedback 15 product folder links: LMX2522 lmx2532
LMX2522 , lmx2532 snws009b ? march 2003 ? revised april 2013 www.ti.com r2 register the r2 register address bits (r2 [1:0]) are ? 10 ? . the if_cur [1:0] bits program the if charge pump current. considering the external if vco and loop filter, the user can select the amount of if charge pump current to be 100 a, 200 a, 300 a or 800 a. table 12. r2 register register msb shift register bit location lsb 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 data field address field r2 if_ 0 0 1 0 0 1 1 1 0 1 1 0 1 0 1 0 0 0 1 0 1 0 (default) cur[1:0] name functions if_cur [1:0] if charge pump current 00 = 100 a 01 = 200 a 10 = 300 a 11 = 800 a 16 submit documentation feedback copyright ? 2003 ? 2013, texas instruments incorporated product folder links: LMX2522 lmx2532
LMX2522 , lmx2532 www.ti.com snws009b ? march 2003 ? revised april 2013 r3 register the r3 register address bits (r3 [2:0]) are ? 011 ? . register r3 contains the controls for the phase lock bandwidth controls (bw_dur, bw_crl and bw_en). the duration of the digital controller portion of the bandwidth control is set by bw_dur [1:0]. the minimum time set with 00 and increasing durations to the maximum value set with 11. bw_crl [1:0] sets the phase offset criterion for the bandwidth controller. once the phase offset between the reference clock and the divided vco signal are within the set criterion, the bandwidth control stops. the maximum phase offset is set with 00 and decreases to the minimum value set with 11. bw_en enables the bandwidth control in the locking state. the vco dynamic current is also controlled in register r3 with vco_cur [1:0]. the minimum value corresponds to 00 and increases to a maximum value set at 11. table 13. r3 register register msb shift register bit location lsb 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 data field address field r3 bw_ bw_ b 1 0 1 1 1 1 0 1 0 0 0 1 1 0 vco_ 0 1 1 (default) dur crl w_ cur [1:0] [1:0] en [1:0] name functions bw_dur [1:0] bandwidth duration 00 = minimum value (recommended) 01 = 10 = 11 = maximum value bw_crl [1:0] bandwidth control 00 = maximum phase offset (recommended) 01 = 10 = 11 = minimum phase offset bw_en bandwidth enable 0 = disable 1 = enable (recommended) vco_cur [1:0] vco dynamic current 00 = minimum value 01 = 10 = 11 = maximum value (recommended) copyright ? 2003 ? 2013, texas instruments incorporated submit documentation feedback 17 product folder links: LMX2522 lmx2532
LMX2522 , lmx2532 snws009b ? march 2003 ? revised april 2013 www.ti.com r4 register the r4 register address bits (r3 [3:0]) are ? 0111 ? . register r4 is used to set the if n counters if the default value is not desired. this register is only active if the spi_def bit in register r0 is 0. the if n counter consists of the 9-bit programmable counter (if_b counter) and the 4-bit swallow counter (if_a counter). the equations for calculating the counter values are presented below. table 14. r4 register register msb shift register bit location lsb 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 data field address field r4 0 0 0 1 0 0 0 if_a if_b 0 1 1 1 [3:0] [8:0] name functions if_a [3:0] if a counter 4-bit swallow counter 0 if_a 15 if_b [8:0] if b counter 9-bit programmable counter 1 if_b 511 if frequency setting: f vco = {16 x if_b + if_a} x f osc / r where (if_a < if_b) where ? f vco : output frequency of if voltage controlled oscillator (if vco) ? if_b: preset divide ratio of binary 9-bit programmable counter (1 if_b 511) ? if_a: preset divide ratio of binary 4-bit swallow counter (0 if_a 15) ? if_r: preset divide ratio of binary 9-bit programmable reference counter (2 if_r 511) ? f osc : reference oscillator frequency 18 submit documentation feedback copyright ? 2003 ? 2013, texas instruments incorporated product folder links: LMX2522 lmx2532
LMX2522 , lmx2532 www.ti.com snws009b ? march 2003 ? revised april 2013 r5 register the r5 register address bits (r5 [4:0]) are ? 01111 ? . register r5 is used to set the if_r divider if the default value is not desired. this register is only active if the spi_def bit in register r0 is 0. table 15. r5 register register msb shift register bit location lsb 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 data field address field r5 0 0 1 1 0 0 0 0 1 0 if_r 0 1 1 1 1 [8:0] name functions if_r [8:0] if r counter 9-bit programmable counter 2 if_r 511 r6 register the r6 register address bits (r6 [5:0]) are ? 011111 ? . register r6 is used for internal testing of the device and is not intended for customer use. this register is only active if the spi_def bit in register r0 is 0. table 16. r6 register register msb shift register bit location lsb 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 data field address field r6 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 copyright ? 2003 ? 2013, texas instruments incorporated submit documentation feedback 19 product folder links: LMX2522 lmx2532
LMX2522 , lmx2532 snws009b ? march 2003 ? revised april 2013 www.ti.com revision history changes from revision a (april 2013) to revision b page ? changed layout of national data sheet to ti format .......................................................................................................... 19 20 submit documentation feedback copyright ? 2003 ? 2013, texas instruments incorporated product folder links: LMX2522 lmx2532
package option addendum www.ti.com 1-nov-2013 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples LMX2522lq1635 nrnd wqfn njb 28 1000 tbd call ti call ti -30 to 85 25221635 LMX2522lq1635/nopb active wqfn njb 28 1000 green (rohs & no sb/br) cu sn level-3-260c-168 hr -30 to 85 25221635 (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release.
package option addendum www.ti.com 1-nov-2013 addendum-page 2 in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant LMX2522lq1635 wqfn njb 28 1000 178.0 12.4 5.3 5.3 1.3 8.0 12.0 q1 LMX2522lq1635/nopb wqfn njb 28 1000 178.0 12.4 5.3 5.3 1.3 8.0 12.0 q1 package materials information www.ti.com 24-apr-2013 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) LMX2522lq1635 wqfn njb 28 1000 213.0 191.0 55.0 LMX2522lq1635/nopb wqfn njb 28 1000 213.0 191.0 55.0 package materials information www.ti.com 24-apr-2013 pack materials-page 2
mechanical da t a njb0028a www .ti.com lqa28a (rev b)
important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per jesd46, latest issue, and to discontinue any product or service per jesd48, latest issue. buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all semiconductor products (also referred to herein as ? components ? ) are sold subject to ti ? s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in ti ? s terms and conditions of sale of semiconductor products. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. ti assumes no liability for applications assistance or the design of buyers ? products. buyers are responsible for their products and applications using ti components. to minimize the risks associated with buyers ? products and applications, buyers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which ti components or services are used. information published by ti regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of significant portions of ti information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. ti is not responsible or liable for such altered documentation. information of third parties may be subject to additional restrictions. resale of ti components or services with statements different from or beyond the parameters stated by ti for that component or service voids all express and any implied warranties for the associated ti component or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of ti components in its applications, notwithstanding any applications-related information or support that may be provided by ti. buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. buyer will fully indemnify ti and its representatives against any damages arising out of the use of any ti components in safety-critical applications. in some cases, ti components may be promoted specifically to facilitate safety-related applications. with such components, ti ? s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. nonetheless, such components are subject to these terms. no ti components are authorized for use in fda class iii (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use. only those ti components which ti has specifically designated as military grade or ? enhanced plastic ? are designed and intended for use in military/aerospace applications or environments. buyer acknowledges and agrees that any military or aerospace use of ti components which have not been so designated is solely at the buyer ' s risk, and that buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. ti has specifically designated certain components as meeting iso/ts16949 requirements, mainly for automotive use. in any case of use of non-designated products, ti will not be responsible for any failure to meet iso/ts16949. products applications audio www.ti.com/audio automotive and transportation www.ti.com/automotive amplifiers amplifier.ti.com communications and telecom www.ti.com/communications data converters dataconverter.ti.com computers and peripherals www.ti.com/computers dlp ? products www.dlp.com consumer electronics www.ti.com/consumer-apps dsp dsp.ti.com energy and lighting www.ti.com/energy clocks and timers www.ti.com/clocks industrial www.ti.com/industrial interface interface.ti.com medical www.ti.com/medical logic logic.ti.com security www.ti.com/security power mgmt power.ti.com space, avionics and defense www.ti.com/space-avionics-defense microcontrollers microcontroller.ti.com video and imaging www.ti.com/video rfid www.ti-rfid.com omap applications processors www.ti.com/omap ti e2e community e2e.ti.com wireless connectivity www.ti.com/wirelessconnectivity mailing address: texas instruments, post office box 655303, dallas, texas 75265 copyright ? 2013, texas instruments incorporated

▲Up To Search▲

Price & Availability of LMX2522

	To Download LMX2522 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .